FPGA & ASIC IP Cores | Ethernet MAC & PCS + RS-FEC
One-Stop Solution for custom silicon IP
Licensable Intellectual Property for FPGA, ASIC or ASSP Designs
Our custom silicon IP is the answer when off-the-shelf solutions are not available or just not good enough. Orthogone’s Ethernet and networking products are revolutionizing the design of high-speed and high-density communications network equipment. Our highly optimized IP cores are the top choice for data centers, networking and communications equipment because they offer:
Ultra efficient gate count and resource utilization:
- Substantial cost savings because lower density FPGA devices can be used to achieve the same performances
- Huge reduction in ASIC/ASSP die area resulting in lower cost per silicon die and significant power consumption reduction
- The industry’s best performance – critical for time sensitive applications such as high frequency trading and data center Ethernet switches
Plug-and-play functionality and easy integration:
- High timing margin of >20% on mid-speed grade FPGA devices
- Direct interface to Intel PSG and Xilinx FPGA high-speed transceivers
Contact us for an IP core that’s right for your needs and we’ll also provide you with a free evaluation license.
For custom design and implementation support our expert engineers offer a range of electronic design services including FPGA/ASIC design, PCB design, software development and full turnkey electronic product development.
High Performance Ethernet MAC & PCS + RS-FEC
The high performance Ethernet MAC & PCS IP cores are based on a unified Verilog code solution that scales from 1-Gbps to 100-Gbps data rates. The cores optionally include Reed Solomon FEC RS(528, 514, 10) with FEC bypass and error correction bypass capabilities.
These FPGA/ASIC IP cores are designed using advanced techniques leading to unmatched ultra-low gate count utilization and amazing latency performances. They include a rich set of standard and advanced features making them ideal for a large number of applications.
The cores provide best-in-class performances in all categories and include some unique differentiators:
- Significant improvement in gate count and resource utilization performances
- Ultra-low wire-to-wire latency for 10G and 25G options
- Unified code solution supporting multiple rates, 1-, 10-, 25-, 40- and 100-Gbps
- Fully integrated MAC, PCS, and optionally RS-FEC solutions
- High timing margin of > 20% on mid-speed grade FPGA devices
- High scalability and flexibility where same code and documentation is valid for all rates
- Fully configurable statistics vector and collector on MAC, PCS, and RS-FEC
The IP cores are released and available now.
For more detailed technical information, please download the product briefs below: